Design and verify the 4- Bit Synchronous/ Asynchronous Counter using JK flip flop

One of the major drawbacks to the use of asynchronous counters is that ____________
A counter is implemented using three (3) flip-flops, possibly it will have ________ maximum output status.
Which sequential circuits are applicable for counting pulses?
A decimal counter has ______ states.
Counter is a ____________ .